In the design and construction of an electronic imaging system, a system's optics often focus an image on a focal plane which exhibits a predetermined geometrical shape and size. Electronic sensors may then be located on the focal plane to measure varying amounts of light focused thereon. Often, such sensors represent arrays of photo diodes or photo transistors, each one of which is called a pixel herein. Greater precision of an image may be obtained by focusing the image over a greater number of pixels. Thus, it would be desirable to provide integrated circuit devices which maximize the number of pixels that are contained within a given integrated circuit surface area and to manufacture such integrated circuits to be as large as possible. Specifically, the fabrication of a single integrated circuit large enough to contain all pixels needed for an imaging system would be a most desirable solution. However, device yields on an extremely large integrated circuit would be so low that this approach is not practical. The current state of integrated circuit manufacturing technology places limits on the minimum pixel size, number of pixels manufacturable in a given defect free area, and the maximum defect free integrated circuit surface area that can be processed into a single integrated circuit. Accordingly, greater precision may then be obtained at a reasonable yield by making an array of circuit chips containing pixels from several relatively small individual integrated circuit devices, wherein the devices are abutted against one another as tightly as possible.
However, when individual integrated circuit devices abut together to form an integrated circuit mosaic which functions as an imaging array, potential problems arise due to the junction between individual devices. For example, each of the integrated circuit devices or chip dice should contain active regions or pixels extending completely to a die edge. Otherwise, such an imaging system will have dead zones in the sensor array at dice edges where pixels have been omitted.
In addition, two chips or dice which abut together should fit together as tightly as possible to minimize dead zones between the dice. Accordingly, tolerances which are maintained while separating a die from a wafer within which the die is manufactured should be minimized to ensure a tight fit. In other words, the die edge should be as smooth as possible to minimize any uncertainty about the precise location of a die edge. Such uncertainties cause the dice in a mosaic to be spaced apart, and an imaging system constructed thereof has excessively large dead zones.
Furthermore, the electrically active or epitaxial layer of a die in the vicinity of a die edge should be preserved in an undamaged form. Pixels which reside in a damaged area of an electrically active layer near a die edge may exhibit a response which differs from that of pixels more centrally located in the die. Accordingly, a damaged electrically active layer may produce severe non-uniformity in a resulting image.
Prior art dice are typically separated from a wafer by a process which scribes and then cleaves or saws between adjacent dice. Such techniques tend to provide a relatively coarse tolerance within which a die edge is defined. Additionally, such techniques tend to damage the electrically active layer near the die edge. Although edge roughness may be smoothed somewhat by polishing after dicing, the polishing process and fixturization requirements of the polishing process tend to damage the electrically active layer near the dice edges. Consequently, the industry has a need for a mosaicable die which may be abutted against another mosaicable die as tightly as possible and which permits active circuitry near or at a die edge.